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source and drain中文是什么意思

  • 层连接晶体管栅极和源以及漏极

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  • 例句与用法
  • Thus it created a conductive n channel between the source and drain .
    这样在源和漏之间就产生了一个导电的n型沟道。
  • In fet devices , the presence of an electrical field at the gate moderates the flow between the source and drain
    在fet器件中,栅极电场的存在会调节源极和漏极之间的电流。
  • It is found that the height of the metal electrode , the distance between the source and drain electrodes , the thickness of the sio
    研究了场效应纳电子晶体管构造过程中金属电极的结构设计,源-漏电极高度sio
  • In the design of the device , a kind of junction termination technology , polysilicon field plate was introduced at the edge of source and drain of the device . it reduced the electric field of pn junction and nn + at the surface to avoid breakdown at the two points
    在器件设计过程中,在源端和漏端都采用了多晶场板技术,减小了表面pn结和nn +处的峰值电场,避免了器件在这两处过早击穿。
  • Usually series mode is used in low frequency circuit while bypass mode is used in high frequency circuit , series mode micro - switch with cantilever structure is similar to an fet , when voltage is applied on gate , and the fet will be turned on between source and drain
    有静电电压作用在梁和底面电极时,梁发生偏转,在源极和漏极之间实现导通,常用于自控和通信系统的信号通路空气桥旁路开关主要用于微波段信号的通路。
  • In order to do the research works above better , we must can precisely control the width of the quasi - 1d channel and the cut off point , and also must precisely inspire current in the 2deg , so we designed the 2 channel high precision and high stability voltage source , one channel can supply the minus voltage to the split - gate , and the other one can supply the offset voltage between the source and drain pole
    为了进行上述研究,必须能够精确的控制准一维电子通道的宽度和钳断,以及精确的在2deg上激励电流,由此我们设计研发了给分裂门加负偏压和给准一维电子通道加源漏偏压的两路高精度高稳定性馈源。
  • It is believed that p - si tft will be the main type in the future panel display . among the process of manufacture p - si tft , the source and drain will have the superposition with grid for the reason of machine ’ s alignment error . the superposition will bring superposition capacitance and it will badly cut down the electric performance
    在制备多晶硅tft时,由于机器的套准误差会在栅极与源、漏极之间产生重叠部分,这样就造成了栅源、栅漏之间的交叠电容,交叠电容的存在严重影响了多晶硅tft的性能,而利用自对准工艺制备的多晶硅tft则避免了交叠电容的产生。
  • 推荐英语阅读
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Last modified time:Thu, 14 Aug 2025 00:29:56 GMT

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